Document Type
Dissertation
Degree
Doctor of Philosophy (PhD)
Major/Program
Computer Engineering
First Advisor's Name
Gang Quan
First Advisor's Committee Title
Committee chair
Second Advisor's Name
Arif Selcuk Uluagac
Second Advisor's Committee Title
Committee member
Third Advisor's Name
Nezih Pala
Third Advisor's Committee Title
Committee member
Fourth Advisor's Name
Wujie Wen
Fourth Advisor's Committee Title
Committee member
Fifth Advisor's Name
Raju Rangaswami
Fifth Advisor's Committee Title
Committee member
Keywords
thermal, power, multi-core, real-time, temperature, throughput, CPU, GPU, embedded systems, low-power design, energy, operating systems, computer architecture
Date of Defense
3-21-2018
Abstract
Over the past decades, the shrinking transistor size enabled more transistors to be integrated into an IC chip, to achieve higher and higher computing performances. However, the semiconductor industry is now reaching a saturation point of Moore’s Law largely due to soaring power consumption and heat dissipation, among other factors. High chip temperature not only significantly increases packing/cooling cost, degrades system performance and reliability, but also increases the energy consumption and even damages the chip permanently. Although designing 2D and even 3D multi-core processors helps to lower the power/thermal barrier for single-core architectures by exploring the thread/process level parallelism, the higher power density and longer heat removal path has made the thermal problem substantially more challenging, surpassing the heat dissipation capability of traditional cooling mechanisms such as cooling fan, heat sink, heat spread, etc., in the design of new generations of computing systems. As a result, dynamic thermal management (DTM), i.e. to control the thermal behavior by dynamically varying computing performance and workload allocation on an IC chip, has been well-recognized as an effective strategy to deal with the thermal challenges.
Over the past decades, the shrinking transistor size, benefited from the advancement of IC technology, enabled more transistors to be integrated into an IC chip, to achieve higher and higher computing performances. However, the semiconductor industry is now reaching a saturation point of Moore’s Law largely due to soaring power consumption and heat dissipation, among other factors. High chip temperature not only significantly increases packing/cooling cost, degrades system performance and reliability, but also increases the energy consumption and even damages the chip permanently. Although designing 2D and even 3D multi-core processors helps to lower the power/thermal barrier for single-core architectures by exploring the thread/process level parallelism, the higher power density and longer heat removal path has made the thermal problem substantially more challenging, surpassing the heat dissipation capability of traditional cooling mechanisms such as cooling fan, heat sink, heat spread, etc., in the design of new generations of computing systems. As a result, dynamic thermal management (DTM), i.e. to control the thermal behavior by dynamically varying computing performance and workload allocation on an IC chip, has been well-recognized as an effective strategy to deal with the thermal challenges.
Different from many existing DTM heuristics that are based on simple intuitions, we seek to address the thermal problems through a rigorous analytical approach, to achieve the high predictability requirement in real-time system design. In this regard, we have made a number of important contributions. First, we develop a series of lemmas and theorems that are general enough to uncover the fundamental principles and characteristics with regard to the thermal model, peak temperature identification and peak temperature reduction, which are key to thermal-constrained real-time computer system design. Second, we develop a design-time frequency and voltage oscillating approach on multi-core platforms, which can greatly enhance the system throughput and its service capacity. Third, different from the traditional workload balancing approach, we develop a thermal-balancing approach that can substantially improve the energy efficiency and task partitioning feasibility, especially when the system utilization is high or with a tight temperature constraint. The significance of our research is that, not only can our proposed algorithms on throughput maximization and energy conservation outperform existing work significantly as demonstrated in our extensive experimental results, the theoretical results in our research are very general and can greatly benefit other thermal-related research.
Identifier
FIDC004089
ORCID
https://orcid.org/0000-0002-5182-9666
Recommended Citation
SHA, SHI, "The Thermal-Constrained Real-Time Systems Design on Multi-Core Platforms -- An Analytical Approach" (2018). FIU Electronic Theses and Dissertations. 3713.
https://digitalcommons.fiu.edu/etd/3713
Included in
Computer and Systems Architecture Commons, Hardware Systems Commons, Other Computer Engineering Commons, Power and Energy Commons
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