Document Type
Thesis
Degree
Master of Science (MS)
Major/Program
Electrical Engineering
First Advisor's Name
Armando Barreto
First Advisor's Committee Title
Committee Chair
Second Advisor's Name
Subbarao V. Wunnava
Third Advisor's Name
Jean Andrian
Date of Defense
11-7-1995
Abstract
The most significant risk of updating embedded system code is the possible loss of system firmware during the update process. If the firmware is lost, the system will cease to operate, which can be very costly to the end user. This thesis is concerned with exploring alternate architectures which exploit the integration of flash memory technology in order to overcome this problem. Three design models and associated software techniques will be presented. These design models are described in detail in terms of the strategies they employ in order to prevent system lockup and the loss of firmware. The most important objective, which is addressed in the third model, is to ensure that the system can continue to process interrupts during the update. In addition, a portion of this research was aimed at providing the capability to perform updates remotely, and at maximizing system code memory space and available system RAM.
Identifier
FI14060192
Recommended Citation
Chi, Hsiang, "Flash memory boot block architecture for safe firmware updates" (1995). FIU Electronic Theses and Dissertations. 2160.
https://digitalcommons.fiu.edu/etd/2160
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