Algorithms and Circuits for Analog-Digital Hybrid Multibeam Arrays

Authors

Paboda Viduneth A. Beruwawela PathiranageFollow

Document Type

Dissertation

Degree

Doctor of Philosophy (PhD)

Major/Program

Electrical Engineering

First Advisor's Name

Arjuna Madanayake

First Advisor's Committee Title

Committee Chair

Second Advisor's Name

Jean H. Andrian

Second Advisor's Committee Title

Committee Member

Third Advisor's Name

Elias Alwan

Third Advisor's Committee Title

Committee Member

Fourth Advisor's Name

Pezhman Mardanpour

Fourth Advisor's Committee Title

Committee Member

Keywords

Multibeams, 5G, 6G, Digital Beamforming, Analog Beamforming, Wideband Multibeams

Date of Defense

11-12-2019

Abstract

Fifth generation (5G) and beyond wireless communication systems will rely heavily on larger antenna arrays combined with beamforming to mitigate the high free-space path-loss that prevails in millimeter-wave (mmW) and above frequencies. Sharp beams that can support wide bandwidths are desired both at the transmitter and the receiver to leverage the glut of bandwidth available at these frequency bands. Further, multiple simultaneous sharp beams are imperative for such systems to exploit mmW/sub-THz wireless channels using multiple reflected paths simultaneously. Therefore, multibeam antenna arrays that can support wider bandwidths are a key enabler for 5G and beyond systems.

In general, N-beam systems using N-element antenna arrays will involve circuit complexities of the order of N². This dissertation investigates new analog, digital and hybrid low complexity multibeam beamforming algorithms and circuits for reducing the associated high size, weight, and power (SWaP) complexities in larger multibeam arrays. The research efforts on the digital beamforming aspect propose the use of a new class of discrete Fourier transform (DFT) approximations for multibeam generation to eliminate the need for digital multipliers in the beamforming circuitry. For this, 8-, 16- and 32-beam multiplierless multibeam algorithms have been proposed for uniform linear array applications. A 2.4 GHz 16-element array receiver setup and a 5.8 GHz 32-element array receiver system which use field programmable gate arrays (FPGAs) as digital backend have been built for real-time experimental verification of the digital multiplierless algorithms. The multiplierless algorithms have been experimentally verified by digitally measuring beams. It has been shown that the measured beams from the multiplierless algorithms are in good agreement with the exact counterpart algorithms.

Analog realizations of the proposed approximate DFT transforms have also been investigated leading to low-complex, high bandwidth circuits in CMOS. Further, a novel approach for reducing the circuit complexity of analog true-time delay (TTD) N-beam beamforming networks using N-element arrays has been proposed for wideband squint-free operation. A sparse factorization of the N-beam delay Vandermonde beamforming matrix is used to reduce the total amount of TTD elements that are needed for obtaining N number of beams in a wideband array. The method has been verified using measured responses of CMOS all-pass filters (APFs). The wideband squint-free multibeam algorithm is also used to propose a new low-complexity hybrid beamforming architecture targeting future 5G mmW systems. Apart from that, the dissertation also explores multibeam beamforming architectures for uniform circular arrays (UCAs). An algorithm having N log N circuit complexity for simultaneous generation of N-beams in an N-element UCA is explored and verified.

Identifier

FIDC008841

ORCID

https://orcid.org/0000-0001-8128-4647

Previously Published In

Arjuna Madanayake, Viduneth Ariyarathna, Suresh Madishetty, Sravan Pulipati, Renato J. Cintra, Faabio M. Bayer, Leonoid Belostotski, Soumyajit Mandal, Theodore S. Rappaport, “Towards a Low-SWaP 1024-Beam Digital Array: A 32-Beam Sub-System at 5.8 GHz,” IEEE Transactions on Antennas and Propagation (early access).

Viduneth Ariyarathna, Diego Coelho, Sravan Pulipati, Renato J. Cintra, Fabio M. Bayer, V. S. Dimitrov, and Arjuna Madanayake, “Multibeam Digital Array Receiver Using a 16-Point Multiplierless DFT Approximation,” IEEE Transactions on Antennas and Propagation, vol. 67, no. 2, pp. 925-933, 2019.

Sirani M. Perera, Viduneth Ariyarathna, Nilan Udayanga, Arjuna Madanayake, Ge Wu, Leonid Belostotski, Yingying Wang, Soumyajit Mandal, Renato J. Cintra and Theodore S. Rappaport, “Wideband N-Beam Arrays using Low-Complexity Algorithms and Mixed-Signal Integrated Circuits,” IEEE Journal Selected Topics in Signal Processing, vol. 12, no. 2, pp. 368-382, 2018.

Viduneth Ariyarathna, Arjuna Madanayake, Xinyao Tang, Diego Coelho, Renato J. Cintra, Leonid Belostotski, Soumyajit Mandal and Theodore S. Rappaport, “Analog Approximate-FFT 8/16-Beam Algorithms, Architectures and CMOS Circuits for 5G Beamforming MIMO Transceivers,” IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 8, no. 3, pp. 466-479, 2018.

Viduneth Ariyarathna, Nilan Udayanga, Arjuna Madanayake, Leonid Belostotski, Sirani Perera and Renato J Cintra, “Design methodology of an analog 9-beam squint-free wideband IF multi-beamformer for mmW applications,” in IEEE Moratuwa Engineering Research Conference (MERCon), 2017.

Arjuna Madanayake, Viduneth Ariyarathna, Nilan Udayanga, Leonid Belostotski, Sirani Perera, Renato Cintra, “Design of a low-complexity wideband analog true-time-delay 5-beam array in 65nm CMOS, in IEEE Midwest Symposium on Circuits and Systems (MWSCAS), 2017.

A. Madanayake, N. Udayanga, and V. Ariyarathna, “Wideband delay-sum digital aperture using Thiran all-pass fractional delay filters,” in IEEE Radar Conference (RadarConf), May 2016.

Recommended Citation

Beruwawela Pathiranage, Paboda Viduneth A., "Algorithms and Circuits for Analog-Digital Hybrid Multibeam Arrays" (2019). FIU Electronic Theses and Dissertations. 4321.
https://digitalcommons.fiu.edu/etd/4321