Document Type

Dissertation

Degree

Doctor of Philosophy

Department

Electrical Engineering

Advisor's Name

Jeffrey Fan

Advisor's Title

Committee Chair

Advisor's Name

Armando Barreto

Advisor's Name

Deng Pan

Advisor's Name

Jean H. Andrian

Advisor's Name

Chunlei Wang

Keywords

System-on-a-Chip (SoC); H.264 Architecture

Date of Defense

11-4-2010

Abstract

Today, most conventional surveillance networks are based on analog system, which has a lot of constraints like manpower and high-bandwidth requirements. It becomes the barrier for today’s surveillance network development. This dissertation describes a digital surveillance network architecture based on the H.264 coding/decoding (CODEC) System-on-a-Chip (SoC) platform. The proposed digital surveillance network architecture includes three major layers: software layer, hardware layer, and the network layer.

The following outlines the contributions to the proposed digital surveillance network architecture. (1) We implement an object recognition system and an object categorization system on the software layer by applying several Digital Image Processing (DIP) algorithms. (2) For better compression ratio and higher video quality transfer, we implement two new modules on the hardware layer of the H.264 CODEC core, i.e., the background elimination module and the Directional Discrete Cosine Transform (DDCT) module. (3) Furthermore, we introduce a Digital Signal Processor (DSP) sub-system on the main bus of H.264 SoC platforms as the major hardware support system for our software architecture. Thus we combine the software and hardware platforms to be an intelligent surveillance node.

Lab results show that the proposed surveillance node can dramatically save the network resources like bandwidth and storage capacity.

Share

COinS