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Hardware/software (HW/SW) cosimulation integrates software simulation and hardware simulation simultaneously. Usually, HW/SW co-simulation platform is used to ease debugging and verification for very large-scale integration (VLSI) design. To accelerate the computation of the gesture recognition technique, an HW/SW implementation using field programmable gate array (FPGA) technology is presented in this paper. The major contributions of this work are: (1) a novel design of memory controller in the Verilog Hardware Description Language (Verilog HDL) to reduce memory consumption and load on the processor. (2) The testing part of the neural network algorithm is being hardwired to improve the speed and performance. The American Sign Language gesture recognition is chosen to verify the performance of the approach. Several experiments were carried out on four databases of the gestures (alphabet signs A to Z). (3) The major benefit of this design is that it takes only few milliseconds to recognize the hand gesture which makes it computationally more efficient.
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Priyanka Mekala, Jeffrey Fan, Wen-Cheng Lai, and Ching-Wen Hsue, “Gesture Recognition Using Neural Networks Based on HW/SW Cosimulation Platform,” Advances in Software Engineering, vol. 2013, Article ID 707248, 13 pages, 2013. doi:10.1155/2013/707248
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This article was originally published in Hindawi Advances in Software Engineering Volume 2013 (2013).